FinFET devices are being used to improve device performance, particularly in technologies where the smallest features are 20 nm or smaller. Memory, such as static random access memory (SRAM) for example, is one application where FinFETs can be deployed. In the memory area, the small feature sizes provided by FinFETs allows devices to be densely packed together to achieve correspondingly dense data storage.
The present disclosure provides techniques that can alter the voltage thresholds of FinFET devices to suit a desired application. One such application is low-power memory (e.g., SRAM), where different voltage thresholds can help achieve a particularly good balance of reliable read operations and fast write operations.